ADN4666 3 V, LVDS, Quad CMOS Differential Line Receiver
The ADN4666 is a quad-channel, CMOS low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption.
The device accepts low voltage (350 mV typical) differential input signals and converts them to a single-ended, 3 V TTL/CMOS logic level.
The ADN4666 also offers active high and active low enable/disable inputs (EN and EN) that control all four receivers. These inputs disable the receivers and switch the outputs to a high impedance state. Consequently, the outputs of one or more ADN4666 devices can be multiplexed together to reduce the quiescent power consumption to 10 mW typical.
The ADN4666 and its companion driver, the ADN4665, offer a new solution to high speed, point-to-point data transmission and offer a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).
- Point-to-point data transmission
- Multidrop buses
- Clock distribution networks
- Backplane receivers
Features and Benefits
- ±8 kV ESD IEC 61000-4-2 contact discharge on receiver input pins
- 400 Mbps (200 MHz) switching rates
- 100 ps channel-to-channel skew (typical)
- 3.3 ns propagation delay (maximum)
- 3.3 V power supply
- High impedance outputs on power-down
- Please see data sheet for additional features.